Hardware Development Engineer | FPGA RTL

Mountain View, CA
About us:
Aeva is building the next generation of sensing and perception for autonomous vehicles and beyond. With its unique ability to measure instantaneous velocity for each pixel, long-range performance at high resolutions, while being free from LiDAR or sunlight interference, Aeva’s 4D LiDAR is built from the ground up at silicon photonics scale for mass-market applications.

Role Overview:
We are looking for an FPGA Engineer with experience implementing digital signal processing algorithms on FPGAs for complex optoelectronic systems

What you'll be doing:

  • Participate in all aspects of the FPGA development process, including FPGA architecture definition, code simulation, RTL development and verification, hardware validation and final testing

What you have:

  • Solid fundamentals in mathematics, digital signal processing and/or communication systems
  • 2-5 years’ experience writing RTL code in Verilog and/or VHDL
  • Experience with bring-up and debugging new hardware systems
  • Ability to deliver results in a very fast-moving environment
  • Desire to learn & implement groundbreaking new hardware technology
  • Ability to quickly produce thoroughly verified logic modules


  • Experience on Xilinx Zynq SoC devices
  • Experience with High-Level Synthesis tools for FPGA
  • Experience with interfacing JESD204b ADC/DACs
  • Knowledge of FFTs, correlators, polyphase filters, I-Q mixers, etc.
  • Knowledge of advanced verification techniques (transaction-level self-checking test benches, constrained random testing, etc.)

What's in it for you:

  • Be part of a fast paced and dynamic team
  • Very competitive compensation and meaningful stock grants
  • Exceptional benefits: Medical, Dental, Vision, and more
  • Unlimited PTO: We care about results, not punching timecards

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