About us:
Aeva’s mission is to bring the next wave of perception to a broad range of applications from automated driving to industrial robotics, consumer electronics, consumer health, security, and beyond. Aeva is transforming autonomy with its groundbreaking sensing and perception technology that integrates all key LiDAR components onto a silicon photonics chip in a compact module. Aeva 4D LiDAR sensors uniquely detect instant velocity in addition to 3D position, allowing autonomous devices like vehicles and robots to make more intelligent and safe decisions.
Role Overview:
We are looking for a Photonics Design Automation and layout engineer who will be a part of the core silicon photonics development team. We are looking for technical expertise broadly across various areas including layout automation, PDK management, physical verification, and infrastructure management. The successful candidate will work to develop and deploy automation workflow and infrastructure for photonic integrated circuit designs and tape-outs.
What you'll do
- Drive various development activities including schematic driven layout and design, p-cell development, PDK management, and physical verifications.
- Drive software selection procedures to implement integrated environment for photonics simulation and layout tools.
- Drive road map for photonics design automation.
- Work cross-functionally with design, process and test teams to develop CAD infrastructure that facilitate the compliance of DfX requirements and foundry design rules.
- Manage in-house photonic component model and layout libraries with proper revision control and regression tests.
- Continuously monitor quality escapes, and deploy corrective actions with a proper root cause analysis.
What you have
- 10+ years of integrated circuit layout and design automation experience, preferably in a field of integrated photonics
- Comprehensive understanding of various areas of CAD developments encompassing simulation/layout automation, PDK development, and management, physical verification (LVS/DRC), hardware/software infrastructure management
- Expertise in p-cell development, LVS/DRC run-set development, source code revision control, and/or regression tests
- Proficiency in commercial software tools commonly used in photonics mask layout from Cadence, Synopsys, Luceda, and Klayout
- Familiarity with the semiconductor fabrication process
- Experience with source code and library management
- Experience with Python and Linux shell scripting
Nice to have
- Experience with Analog and mixed signal layout
- Knowledge of silicon photonics, and optoelectronic device physics
- Familiarity with commercial photonics simulation software environments from Synopsys, Cadence, Luceda, and Ansys
What's in it for you
- Be part of a fast paced and dynamic team
- Very competitive compensation and meaningful stock grants
- Exceptional benefits: Medical, Dental, Vision, and more
- Unlimited PTO: We care about results, not punching timecards
Salary Range
$154,000—$209,000 a yearSalary pay ranges are determined by role, level, and location. Within the range, the successful candidate’s starting base pay will be determined based on factors including job-related skills, experience, certifications, qualifications, relevant education or training, and market conditions. These ranges are subject to change in the future. Depending on the position offered, equity, bonus, and other forms of compensation may be provided as part of a total compensation package, in addition to comprehensive medical, dental, and vision coverage, pre-tax commuter and health care/dependent care accounts, 401k plan, life and disability benefits, flexible time off, paid parental leave, and 11 paid holidays annually.